The obvious solution to both latency and uncertainty is an external AND
gate.  When you want the signal propagated you just turn on the AND
gate, and turn it off when you want to stop.  Latency is the delay of
the gate and uncertainty is nil.

If you must do it in software look at what clock phases the bit test and
set operations work on.

Sherpa Doug

> -----Original Message-----
> From: Dan Lanciani [mailto:ddl@DANLAN.COM]
> Sent: Friday, February 08, 2002 4:11 AM
> To: PICLIST@MITVMA.MIT.EDU
> Subject: [PIC]: minimum uncertainty input->output
>
>
> Given a 16C54 class device, what is the minimum
> uncertainty/jitter with
> which a change in a general input can be propagated to a
> general output?
> My first thought is that a bit test & skip/goto loop gives a
> three instruction
> cycle uncertainty, but I'm probably missing a trick.  I don't
> care (within
> reason) about minimizing the latency, just the absolute
> uncertainty in the
> latency.
>
>                                 Dan Lanciani
>                                 ddl@danlan.com
>
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>
>

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