So is EEADR in bank 0 or 1? The data sheet itself, page 14 for example,
show them all in bank 1, but you are saying that the 'data and address
indeces aren't in bank 1'???

I'm following this closely, as I'll be playing with them myself in the
next couple of days, and I would be interested to know if there are any
gotchas!

It's not yet too late for me to switch to 16F872 or 16F873 if I have
too!


Regards, Kevin

> -----Original Message-----
> From: pic microcontroller discussion list
> [mailto:PICLIST@mitvma.mit.edu] On Behalf Of Jinx
> Sent: 07 February 2002 09:50
> To: PICLIST@mitvma.mit.edu
> Subject: Re: [PIC]: 16F628 EEPROM write routine
>
>
> > Have you read
> >
> > http://www.microchip.com/download/lit/suppdoc/errata/80073d.pdf
> >
> > It would seem there are some errors in the data sheet
> regarding EEPROM
> > read/write - concerning the banks the registers are in
>
> I read this a couple of days ago. Although I'm not totally
> sure I'm on top of this yet, what I've found disagrees with
> Example 13-2
>
> In that piece of code, setting up for a write, eeadr and
> eedata are loaded AFTER the bank has been changed to bank1
>
> BSF          STATUS,RP0
> MOVLW   CONFIG_ADDR
> MOVWF   EEADR
> MOVLW   CONFIG_DATA
> MOVWF   EEDATA
>
> BSF          EECON1,WREN
>
> In the routine I'm working on, that doesn't produce the
> correct result because the data and address indices aren't in bank1
>
> IMVHO, the errata sheet is misleading, or at least incomplete
>
> If that's true, then it's a poor show. Microchip have these
> ICs for a long long time before we get to play with them and
> the documentation should be perfect. After all, these are
> digital chips with entirely predictable behaviour
>
> But I've a fresh batch of "hat sauce" simmering if that's not
> the case, and someone can show me it's not
>
> --
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http://www.piclist.com/#topics




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