Sorry for bothering you, but I'm feeling so annoyed ! I don't understood from pic archive examples and data sheet if master clock is generated automaticaly by the MSSP module or not. My first thought was yes. I understood that 8 bites of data can be transmitted synchronously with clock pulses. I'm trying to initiate a communication using master1 mode, the sspstat = 0b_0000_0000 and sspcon = 0b_0010_0010 are set appropiate for fosc/64. The pins used are rc3 ( spi-clk ) and rc4 ( spi-data in ) and an extra pin for chip select, all direction are set correct in TRIS register. According to data sheet: " In master mode the data is transmitted/received as soon as the SSPBUF register is written to " and: "The master can initiate the data transfer at any time because it controls the SCK " My device ( MAX121 ) is connected to receive clocks from PIC and to deliver data's as soon as the chip select ( or convst ) is tied to gnd. But how can be determined MSSP to send clocks ? ( I don't want to use slave mode ). And I don't saw any damn clock on to my scope... Thank you in advance, Vasile -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu