On Wed, 16 Jan 2002 16:21:53 -0800, Harold M Hallikainen wrote: > The datasheets (for example, page 73 of the PIC16F62X datasheet)= say the >bit rate is Fosc/(16(X+1)) if BRGH=3D1. Solving for X, we get >X=3D(Fosc/(16*BR))-1 . If Fosc=3D20MHz and BR=3D250e3, we get X=3D44 = (not 5). >Dropping to 4 MHz, we get X=3D0. > So, it seems that it would work. Some have said X has to be = between 1 >and 255 inclusive, but the datasheet says 0 and 255 inclusive. The >datasheet also shows several examples where X=3D0 (for example, 625 kpbs >with Fosc=3D10 MHz). > So, the question remains, why does the datasheet show NA for 250= kbps at >4 MHz? > I have since changed my resonator to 16 MHz and found other bugs= in the >code. I imagine that if I change back to 4 MHz (now that the bugs are >removed), it will work... but I don't know if I want to make the effort. >Just trying to figure out why the datasheet says 250 kbps at 4 MHz is >"NA." Looks like it should work... Well, the math sure works. It probably will work as you expect. My presumption is that Microchip doesn't want to commit that all PICs will reliably work at 4 MHz with a zero divider over all temps and Vdd levels. They may have characterized the circuit and found that, while it works reliably up to 3.579 MHz with a zero divider (which they show), it may get flakey above that. At nominal temps and Vdd levels, I wouldn't think that it would be a problem to push it to 4 MHz. (Note: I wouldn't do this in a commercial product. YMMV) Regards, Bob -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu