Peter, Yes, the Emitter Follower is the configuration to use. ie...Collector to V Source, Emitter to circuit to be powered, and Base to PIC pin (through a current limiting resistor) You don't have to make the Base voltage higher than the Collector. To turn this transistor on, you need to bring the Base ~.7 volts more positive than the Emitter. And since the circuit following the Emitter returns to circuit Ground at some point, and no current is flowing yet because the circuit is open at the Collector-Emitter junction, the Emitter is effectively at ground potential. That said, the transistor should start turning on with a Base voltage of about .7 volts. Once the transistor is turned on, the C-E junction starts conducting and supplies the circuit with the V Source voltage minus the Voltage across the Collector-Emitter pins. This will be about .2 volts or so when the transistor is saturated. And with the transistor used in the way described above, it will be saturated when the Base voltage gets above about 1 volt. The circuit being supplied never sees the .7 volt drop of the Base-Emitter junction, therefore, the circuit will be supplied with the V Source voltage minus the VCE sat of ~.2 V. A quick calculation of the components needed:... Lets say we have an NPN transistor and that transistor has a Beta of 100. Lets further say that the circuit we are powering uses 300 mA of current. To drive this transistor full on, we'll make the Base current about 10% of the Collector current. So in this case, the Base current will be ~30 mA. Now lets say that the PIC pin will output a worst case logic high level of 4.5 volts. So, if we divide the 4.5 volts by 30 mA, we get a value of 150 ohms. So, if we use a 150 ohm resistor in the Base, and connect a PIC pin to the other end of the resistor, and make the PIC output a logic high, with the transistor connected as described above, our circuit should be recieving about .2V or so less than the supply voltage. These calculations and the voltages mentioned here will vary somewhat with your setup because of tolerances and variability in the Hfe (Beta) of the transistors, tolerance of the resistors, etc. But what I describe here should be reasonably close. Let me know if I'm wrong here. But I've done this very thing many times, and I'm reporting what I've seen here. Regards, Jim > On 2002.01.09 06:39 James Paul wrote: >> Peter, >> >> I agree that an Emitter Follower circuit configuration be used, but > > Oh. I must have not made myself clear, because I would NOT use an > emitter follower. > You can't avoid the .7V Vbe drop, and since you would have to take the > base more > positive than the collector to get the emitter up to the collector > voltage I don't > think it can be done. > > However its been along time since I did a solid state theory exam :-) > >> I don't agree with the ~.7 v drop across the transistor. If the >> transistor is saturated, and it should be, the drop across the >> transistor (Vce [sat]) should be only about .2 V. You can adjust >> the Base resistor so that a high from a PIC pin will saturate the >> transistor and cause Vce to be the above said .2V or so. And it >> really doesn't amtter whether you use an NPN or a PNP, the Vce sat is >> going to be about the same (not exactly the same though) provided you >> choose your resistors correctly. Not that with a PNP transistor, it >> will be turned on with a logic low as opposed to a logic high with >> the NPN. > > I don't agree.... Using a common emitter PNP and pulling the base to > ground you can >saturate the transistor and then you can achive the Vce sat drop . > > Peter > > -- > http://www.piclist.com hint: The PICList is archived three different > ways. See http://www.piclist.com/#archives for details. -- http://www.piclist.com hint: The PICList is archived three different ways. See http://www.piclist.com/#archives for details.