I've got these figures for a 16F628-04 - has anyone the means
to make a logR vs F graph ? Preferably as a bmp or gif. If not
I can do it by hand (groan)

The recommended range in the manual is 38k to 1M, which is
an internal clock of around 3.6MHz to 200kHz

   R        Clkout * 4

  2k7    9.40MHz
  3k3    9.35
  4k7    9.23
 10k     8.44
 22k    5.65
  39k    3.50
100k    1.52
220k    0.75
470k    0.393
  1M     0.192
1M5     0.124
2M2     85,600
5M6     36,400
12M     16,400

using this short program

;er_test.asm
;
;Test R vs F for 16F628 ER mode
;
;2nd December 2001

         list p=16F628
         #include <p16F628.inc>

;Porta.6  OSC2 out (fosc/4)
;          7  variable resistor

start  equ 0x00       ;program start vector

       __config _er_osc_clkout & _wdt_off & _pwrte_on & _lvp_off &
_boden_off

         org 0x00
         goto entry

entry    movlw  0x07
         movwf  cmcon

         bsf    status,rp0
         bcf    status,rp1

         movlw  b'10100000'  ;ioio oooo
         movwf  trisa
         clrf   porta

         movlw  b'00000000'  ;oooo oooo
         movwf  trisb
         clrf   portb

         movlw  b'10000000'  ;pull-ups off
         movwf  option_reg

         bcf    status,rp0
         bcf    status,rp1

wait     goto   wait

         end

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