How do you figure out the value of the capacitor, and how long it takes
to charge? I'm not an EE, so sometimes these things are hard for me. If
I wanted to go for simplicity, would it be best to just go for a 10K
pot?

Thanks,

Josh

"Thomas C. Sefranek" wrote:
>
> If you have a large enough capacitor at the input
> ITS impedance is low enough to satisfy the current demand of the A-D
> (In most cases)
> But be aware that the process of measuring the analog value drains the
> capacitor
> and you have to allow enough time for the high resitance path to recharge it
> before you  re-read it.
>
> Josh Koffman wrote:
>
> >Well, the databook for the f877 says that "The maximum recommended
> >impedance for analog sources is 10K". Does this mean that my pots are
> >too high? Also, if I only want to use 8 bits of resolution, do I set the
> >ADFM register to 0, and then just read the result of ADRESH, and forget
> >about ADRESL?
> >
> >Thanks,
> >
> >Josh
> >--
> >A common mistake that people make when trying to design something
> >completely foolproof is to underestimate the ingenuity of complete
> >fools.
> >        -Douglas Adams
> >
> >David VanHorn wrote:
> >
> >>At 03:13 PM 11/24/01 -0500, Josh Koffman wrote:
> >>
> >>>Or how about a 250K pot? Would it really make a difference seeing as I'm
> >>>measuring the relationship between vref and the the analog input?
> >>>
> >>There's no difference, provided that the chip's input impedance is
> >>infinite, and there's no interfering EMI.
> >>Otherwise, you can calculate the effect of non-infinite input impedance.
> >>EMI is harder to predict, but generally, keeping your source impedance low
> >>keeps this from becoming much of a problem.
> >>
> >
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> >
> >
>
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