If you put A and B through slow inverters, you get delayed inverted
signals ~A and ~B.  If you AND A and ~A you get a short pulse when A
switches 0 to 1.  If you NOR B and ~B you get a short pulse when B
switches 1 to 0.  AND the two pulses for your result.

You can adjust how close to the exact same time the edges need to be by
controlling the speed of the inverters.

Sherpa Doug

> -----Original Message-----
> From: James Williams [mailto:jlw.creditview@VERIZON.NET]
> Sent: Friday, November 16, 2001 10:59 AM
> To: PICLIST@MITVMA.MIT.EDU
> Subject: [PIC]Does anyone know of some logic circuits that
> would detect
> the following situation?
>
>
> A  _____/^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
>
> B  ^^^^^\________/^^^^^^^\_____________
>
> I can't seem to come up with some DISCRETE logic that will
> detect when A
> goes from low to high at the SAME time as B goes from high to low.
>
> Any ideas, without a pic.  Sorry pics are not fast enough.  I
> know that I
> need to store previous state, then latch current state of
> either rising edge
> of A or falling edge of B, and then compare the two.  However i am not
> curtain of how to do it.  I mean if A is used to clock B,
> then B would be at
> 2.5v when A clks, which gives false indication.
>
> Any ideas greately appriciated.
>
> Thanks,
>
> James
>
> --
> http://www.piclist.com#nomail Going offline? Don't AutoReply us!
> email listserv@mitvma.mit.edu with SET PICList DIGEST in the body
>
>
>

--
http://www.piclist.com#nomail Going offline? Don't AutoReply us!
email listserv@mitvma.mit.edu with SET PICList DIGEST in the body