Good day to all. I'm adding some major new functions to some code written by a colleague and started getting short on RAM. Rather than re-target to a different processor, I started looking through his code to see where I could free up RAM. One area that kind of jumped out at me was his delay routines. His routines used the standard 'decfz somereg,F' technique. I could free up a couple of bytes of RAM if I re-wrote his routines to just use W. Thats real easy on the 14 bit core parts: 'addlw -1' works just fine. But this was on the 12 bit core chips. I remembered that John Payson came up with a neat 2's complement technique for complementing the value contained in W and works on all PIC cores: ; complement W addwf FSR,W ;can be any register that does not change between these subwf FSR,W ; two instructions ;done! A 2's complement is simply the 1's complement of a number plus 1. If I took the 1's complement a number, then took the 2's complement of that same number, I'd wind up with the original number plus 1. In other words: a way to increment W without needing any RAM. It works! The version I came up with looks like this: Delay500 movlw -(.500/6) ;desired delay / loop delay Delay500Loop xorlw 0xFF ;1's complement W addwf FSR,W ;2's complement W subwf FSR,W skpz ;W wrap to 0? goto Delay500Loop ;loop is 6 instructions dwayne Dwayne Reid Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax Celebrating 17 years of Engineering Innovation (1984 - 2001) * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * Do NOT send unsolicited commercial email to this email address. This message neither grants consent to receive unsolicited commercial email nor is intended to solicit commercial email. -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu