>Two different be related concepts. Tony was talking about the actual I/O >pin, >whereas you were referring to the config bit. There has been at least one >revision of a 16F87X part where the operation of the chip was adversely >affected by pulling the LVP pin high during programming even when the >chip's >LVP config bit was not programmed for LVP. So all Tony is saying is as a >precaution when programming a LVP chip, always ground the LVP pin even when >doing high voltage programming. When you say "adversely affected" do you mean that the chip failed to program/run correctly, or that the chip was actually damaged? Just curious, as the LVP pin will not be pulled low on the standard NOPPP hardware. James. _________________________________________________________________ Get your FREE download of MSN Explorer at http://explorer.msn.com/intl.asp -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu