LOL, thanks for the entertaining read.

Well, let's see:

> 1.  Watchdog enabled, but not reset in software

As smoeone else pointed out, I'd done the same ... but
setting it to OFF didn't correct the operation.  So
there's more ...

> 2.  Master CLear enabled, but not held high in
> hardware

I dno't see anywhere that I've enabled OR disabled it
(where should that be?) ... but it IS pulled high in
the hardware (through a 10k resistor).

> 3.  Port GP3, or RA4,  which is open collector in
> some PICs, has no pullup
> resistor

I tried to avoid this one completely ... RA4 is the
only I/O pin I didn't use.  RB0 - 6 control the 7
segments, while RB1 enables the first display and RA0
- 3 enable displays 2 - 5.

> 4.  Port RB3, which is a low voltage programming
> input in some PICs, held
> high which louses up ICSP programming

I'm using RB3, but I'm not doing ICSP programming.  I
have to pull the chip and drop it into a NoPPP to burn
the code.

> 5.  TRIS registers not set to the right direction.

I've got both "clrf TrisA" and "clrf TrisB" covered
(in the mainline of code, before the loops).

> Write these 1000 times in the  EEprom blackboard.
> Paste these on your
> forehead or your computer monitor with a yellow
> sticky note, then look at it
> every time you program a PIC.  If you make one of
> these common mistakes,
> whack the sticky note with your palm and chant with
> me: "D'Oh!"

I already did the DOH! for not turning of the WDT.
Other than that, thanks for the suggestions ... but
it's still broken.   ;)

ATM



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