Peter L. Peres wrote:
>
> Hi Roman,
>
> > Peter, I think you may have misunderstood the
> > system? Why add the extra tick?? The beauty of
> > the system is that you only need one 24bit number
> > which is as accurate as timer0 tick.
>
> I don't think that I misunderstood the system. I think I improved it. And
> I don't think that the mistake is there. It could be something else. I am
> asking because I am looking for new ideas (having run out of my own).
>
> I only need a 16 bit counter because the 24 bit value that expresses
> 1,000,000 ends in 0x40. (1 mil is 0x0F 0x42 0x40). Then we notice that the
> number of ticks to substract is 512 per interrupt, which is 0x200, or 0x02
> 0x00 in my notation. The substraction leaves the l.s.byte unchanged all
> the time, it only needs to be added in when the constant is added at the
> unedrflow time (every second).


I really don't think you improved it at all,
instead of using one 24 bit variable with a
simple subtraction that always self-corrects,
you are using a 16 bit variable and another
8bit variable with manual error checking. Once
you start doing manual error detect and correct
it's no longer a bresenham, it's just clumsy
timer code. :o)

Ok, if you are fixed at the 4MHz crystal,
1MHz inst, and you need 1 second period, why
not set the prescaler to /16, which turns
1,000,000 ticks into 62,500 ticks. This will
fit into a 16bit variable. Then every time
timer0 int occurs, every 244Hz, just subtract
one from the hi byte, giving you a simple
16bit bresenham timer. Then when the 16bit
variable gets below zero add another 62,500
to whatever is left in it and generate your
one second event.

This will be very simple in your 16bit C
library and has the added advantage of using
8x less total interrupt time than your current
system.
-Roman

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