>I made a clock to test a timer routine implemented using Bob Ammermann's
>and Roman Black's idea (of accumulator that is substracted from each TMR0
>overflow), and the clock runs slow, with a fast crystal. The crystal is
>4MHz +60ppm (measured) and the clock loses about 5 seconds in two hours,
>which is -700ppm or so. I use psc=0 (div 2) which causes interrupts at
>about 1953Hz with 4MHz crystal. The accumulator adds an extra tick every 8
>ticks with this scheme (TMR0: /2/256 = Tcyc/512 etc: 1000000/512 1953.125
>- where the .125 becomes 1 extra after 8 ticks).


Peter,

    It's probably the software. A few rules for accurate clock:
- Never modify the TMR0 (unless you know exactly what you're doing). Any
write to TMR0 will clear the prescaler = ticks are lost.
- Be sure that in the worst case the interrupt routine is finished in 512
cycles, othervise you'll lose an interrupt.
- If you disable the interrupts in the main code, don't do it for more than
512 cycles.
- Capacitors at OSC1 and OSC2 can also affect the crystal frequency, you can
use them to fine-tune the clock.


Regards,

Djula

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