Hi All,

I have to use PC to communicate with RS-485 bus. I'd like to use the 9-bit
addressing codes available for PICs/8051s and other uCons. Unfortunately
The PC's UART is 8-bit, but I can manually control the parity bit.
Probably there is no problem with sending - I can change the parity mode
to get the proper 9th bit.
But what about reception? I could use the "parity error" bit to examine the
9th bit of received data, but what about FIFO? (I was familiar with the old
16450 without any fifos).
Does the status register use the FIFO in the same way as data register?
Eg. if I have received and stored in FIFO the following sequence of bytes
(# denotes parity error): 0x10 0x20# 0x15 0x23# 0x40,
will the "parity bit" in the status register change when I read the
consecutive bytes (cleared until 0x10 read, set until 0x20 read, then
cleared until 0x15 read and so on...)?
 Maybe it gets set after the first byte with parity error is received
and written to the FIFO (it would be really creazy)?
So in fact my question is if the receiver's FIFO holds the additional info
(eg. parity & frame errors) together with the bytes themselves.
Are the 16550A and other new UARTs (16650 ...) compatible in that subject?
--
                                TIA & Regards,
                              Wojciech M. Zabolotny
        http://www.ise.pw.edu.pl/~wzab  <--> wzab@ise.pw.edu.pl

Before buying any hardware ask the dealer if it is Open Source friendly!!!
hhtp://www.openhardware.org

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