So I was considering a 16K SRAM (128x128 = 16K).  Does anyone have any
suggestions?? Would this be easy enough to implement? Ie connect my 4bit adc
on port A, read the whole thing and write it parallel via port B to an
SRAM.. that should take less than my 5 allowed instructions =)  I hope!!
unless the SRAM is really complicated.. but I hope not..  I only really know
of SRAM and DRAM, but I know that DRAM will not do the trick =) No chance to
refresh anything here!

Consider using an SX? More MIPS available (roughly 50 versus 5), DRAM might
even be useable.

Wouter van Ooijen

Van Ooijen Technische Informatica: http://www.voti.nl
Jal compiler for PIC uC's:  http://www.xs4all.nl/~wf/wouter/pic/jal

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