> Here's a bare bones circuit for people to criticise unmercifully and
> hopefully improve.

I've only looked at the schematic and not your description.  But c'mon
Russel!  Just a few brain cells in gear before fingers in motion would save
the rest of us save a lot of time.  This circuit is stable and won't oscillate
because you've got two inverting stages tied in a ring with DC paths, which
makes a flip-flop.

As Vin goes up when power is turned on, Q2 will go on via R1 and keep its
collector low, thereby preventing Q1 from ever going on.  If R1 is low
enough Vin will continue to drain thru L1 and Q2 forever or until something
fries (can't tell since you didn't provide component values).  If R1 is too
high to keep Q2 saturated, then Q1 might (again, no component values) turn
on, turning Q2 off.  Once that happens it will stay that way until power is
removed.  At most one single brief pulse will be delivered to the output
each time power is applied.


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, olin@embedinc.com, http://www.embedinc.com

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