> Since everyone is throwing their circuits out there, I've decided to give
in
> and throw out mine too.  This circuit is a piece of a personal project I
am
> currently working on and it was designed before this thread started.
> However, it hasn't been built yet, which is why I didn't want to let it
out
> earlier.  It is also intended for much higher currents, but the topology
> should scale down to lower currents nicely.

Looks good. Fairly conventional (which is not bad). It has limitations for
my original application (eg voltage and less than spartan parts cost) but
should be a fine moderate cost design in many cases.

There is one major problem with the FET used as shown. This is an N-Channel
device but its gate is only driven as high as its drain during turn on. This
means that there will be a drain-source drop of at least Vthreshhold (2 to 4
volts for the IRF5305) leading to very high dissipation.
That's a VERY nice FET you have chosen - it would be a shame to not use it.
This could be achieved by adding a winding on the inductor to provide a
small high side supply . Alternatively changing to a P Channel FET and
changing the drive sense.

The IRF5305 is somewhat dear - Digikey charge $US6.24 in 1's.
Something like an IRF640 (Digikey charge $US1.48 in 1's) would probably
suffice at your proposed current levels.
The Rdson is 0.18 ohms so the dissipation would be much worse than for the
IRF5305. Still OK at your current levels probably.
This is also an N Channel device

You could consider using a P Channel FET.
This would allow your circuit to be used with minimal changes
The IRF6215 P Channel FET that I show in my circuit is sold by Digikey for
$US1.51 in 1's.
The Rdson is 0.3 ohms but at a mean current of 1.5A that's not too bad.
(I'm actually using an ON Semi 200 volt P FET in my final application with
an even higher Rdson but the circuit is unchanged).

_______________

Consider placing a small series current limiting resistor between the drive
transistor emitters and FET gate to limit FET switching times. You can get
immense currents here and FET losses can be increased by the too rapid
switching (yes - you can get too much of a good thing :-) ).

> 1  -  D6 need not be a fast recovery diode.  The values of L3, C4, the
> hysterisis, and the 0-1.5A current draw range make sure that L3 is always
> done conducting before Q1 turns on for the next pulse.  This allows D6 to
be
> an ordinary power diode, which is very useful considering the currents
> envolved.

This is an interesting claim and one I will think further about. I don't
really believe it but I hope you are cirrect as the saving in diode cost can
be significant.
Buck convertersa re usually best run in continuous current mode and this
converter has the option of being run either way.  In continuous mode
switching occurs while inductor current is still flowing so D6 has to handle
Q1 switching on.

> 2  -  Note that the *average* current thru Q1 and L3 is 1.5A max.  Since
> this current will come in pulses, the peak current will be much larger.
> This is an important point that the other designs seemed to have missed.

I agree with that requirement
In a prior post I noted

    > > The flyback diode DBUK2 MUST be rated for a peak current capability
of
    > > several times the mean output current and MUST be a high speed part
(eg NOT
    > > 1N400X).

However, the mean diode current and peak diode currents can be quite
different. Worst case is typically around 50% duty cycle. Especially in
discintinuous current mode, as duity cycle drops (increasing Vin) the peak
current rises but occurs for less time.

> chose these parts to handle a peak current of 6A, since this is some
margin
> above the theoretical peak current.  Note that this also effects the peak
> current rating of D6, because it will see the same peak current as L3.

> 3  -  Oscillation is guaranteed due to the hysterisis provided by R4 and
R2.
> This assumes that +5VREF is a zero impedance source.

Yes - this has a much more "comfortable" feeling tahn in "my" circuit as one
can trace a step by step DC path for the switching.  In "my" design the
inductor forms an essential part of the hysteresis mechanism. Your circuit
would oscillate without the inductor producing a PWM regulator using the FET
in resistance as trhe contro element (you wouldn't of course do this but it
would work after a fashion).

> 4  -  In my project, +5VREF is actually coming from a 5V regulator powered
> by the +12UNREG line.  This is OK since the current draw on the +5VREG
line
> is under 20mA.  You could generate a good enough reference with a zener,
> resistor, and cap.  The cap must be large enough so that its impedance is
> much less than R2 at the switching frequency.  With a custom reference,
the
> R6 and R5 divider could be eliminated and the output voltage fed directly
> into the minus input of the comparator.

This provide more flexibility than in my circuit where Vout is set by a
zener. The NatSemi cct with longtailed pair also provides this flexibility.
Mine is of cours echeaper and simpler (whetehr that makes it better or not
depends on application).

> 5  -  Q2 and Q3 provide the current amplification necessary to switch the
> FET gate quickly.  Note that power FETs have considerable gate
capacitance,
> and the slew rate of most ordinary op amps or comparators would slow down
> significantly if connected directly to the gate.  Any reasonalbe small
> signal "junk box" transistors would do for Q2 and Q3.  The ones show
happen
> to be my junk box transistors I use for this purpose.  They are available
> very cheaply from Jameco.

Agree. I typically use BC337 & BC327 in this application. They are commonly
available and have better specs in this application than most other TO92
transistors while often costing less. (500 mA rated, Beta of 300 typically).

> 7  -  The max input voltage is limited by the max allowed FET gate
voltage,
> which is 20V.  This could easily be extended with a resistor between the
op
> amp output and Q2/Q3 followed by a 12V zener clamp to the +12UNREG line.
> The next limit is the max power supply allowed by the LM6132, which is
24V.
> This could be extended another 10V or so by playing games with the
negative
> supply input, but that gets messy.  The right answer is to use a
comparator
> better suited for the job or make something from a few discrete
transistors
> that can all take the higher voltage.  Keeping the Q2/Q3 current amplifier
> will be especially important then.

A possible solution is to use a resistor and zener from Vin to get the
circuit started and then to feed the comparator supply from Vout or, more
probably, from a secondary winding to give you enough voltage


regards

            Russell McMahon

--
http://www.piclist.com#nomail Going offline? Don't AutoReply us!
email listserv@mitvma.mit.edu with SET PICList DIGEST in the body