Olin wrote: >I was suggesting that more for testing to find the problem than a clean >solution. It might be illuminating to disable interrupts immediately before >the sleep and see how the bits come back after wakeup before any other code >runs. Is there a CLRWDT in the ISR? If so, could some other interrupt be >true on wakeup so that TO gets reset before you can see it in the main code? From my reading of the manual, the _only_ thing that resets (i.e. makes 0) the -TO bit is if the watchdog times out on its own. All other things (e.g. sleep and clrwdt instructions) set the bit. I've done a couple of tests, and the only consistent thing I find is that if I set a breakpoint (MPLAB_ICD or MPLAB-ICE2000) sometime after the wake-from-sleep, the -TO bit is as expected. But if I left it run free, it's not. Hmmm ... I'll get this code running one way or the other (may have to disable ints before going to sleep, and then test INTF upon wake as you suggested, AND still have an ISR fro when RB0/INT changes when not asleep). I might make an ultra-small test program to prove or disprove the -TO bit behavior. Thanks, and I'll report back on what I find. -- ______________________________________ Andrew E. Kalman, Ph.D. aek@pumpkininc.com -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads