> Most of the times you don't have a capacitor tied to an I/O line. But
> it's not uncommon to have 10 to 100 pF of parasitic capacitance
> sitting on an I/O line. Is this a problem? A PIC I/O has around ~ 30
> to 50 ohms output impedance (I'm just guessing this ...). Taking the
> worst case of 50 ohms and 100 pF leads to a 5nS time constant. Even
> when the clock is 20Mhz, this is hardly a factor. So the typical case
> is probably okay with the BCF/BSF's. I'd only begin to really worry
> when driving external cables and similar cases. Something like
> bit-banging an I2C prom would most probably work just fine. Hey, who
> was the bonehead complianing about the original SPI code?

I think you could be a bit more generous with the capacitance. A
single HC series input is typically 50-100pF. The more important
number is the 100ns from clk to output valid and the input setup
time which is TBD in the few datasheets I looked at. If you assume
it is of the same order as the output delay, that's most of a 20Mhz
OSC cycle and the pin load becomes more important.

I also disagree with the BCF/BSF being OK. They're the ones that
get you because even though the instruction infers it's just a bit,
the whole byte is read, modified and written back. If your I2C device
is ACKing on another pin at the time, you've been got.

Steve.


======================================================
Steve Baldwin                Electronic Product Design
TLA Microsystems Ltd         Microcontroller Specialists
PO Box 15-680, New Lynn      http://www.tla.co.nz
Auckland, New Zealand        ph  +64 9 820-2221
email: steveb@tla.co.nz      fax +64 9 820-1929
======================================================

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