Dan Michaels wrote:
>
> At 11:24 AM 8/7/01 +1000, you wrote:
> >Olin Lathrop wrote:
> >
> >> Therefore, for most cases, the original code was just fine:
> >>
> >>     bsf   portb, clock_bit
> >>     bcf   portb, clock_bit
> >
> >
> >Probably so, but even Microchip suggest something like....
> >
> >     bsf   portb, clock_bit
> >     nop
> >     bcf   portb, clock_bit
> >
>
> This only adds in another 0.2 usec with a 20 mhz xtal. Isn't
> gonna help a great deal if a good-sized cap is hanging on the
> pin.

I guess it comes down to a bit of common sense. Xtal speed VS pin
capactiance, and because writes followed by reads take less than a clock
cycle for the data recognition, probably closer to a Q cycle, I guess
the NOP helps a bit - but as you mention not in every case :-)

[Snip]

5.3.2 SUCCESSIVE OPERATIONS ON I/O PORTS
The actual write to an I/O port happens at the end of an
instruction cycle, whereas for reading, the data must be
valid at the beginning of the instruction cycle
(Figure 5-6). Therefore, care must be exercised if a
write followed by a read operation is carried out on the
same I/O port. The sequence of instructions should be
such to allow the pin voltage to stabilize (load depen-dent)
before the next instruction which causes that file
to be read into the CPU is executed. Otherwise, the
previous state of that pin may be read into the CPU
rather than the new state. When in doubt, it is better to
separate these instructions with a NOP or another
instruction not accessing this I/O port.

Therefore, at higher clock frequencies,
a write followed by a read may be problematic.

[Snip]

--
Best regards

Tony

mICros
http://www.bubblesoftonline.com
mailto:sales@bubblesoftonline.com

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