>
>> I don't understand what the argument is here. Seems to me a
>> 2D-R --> pin protection ckt is perfectly correct, as long as R
>> is chosen to limit the max current into the clamping diodes on
>> the pin to a safe value. Chose R > 20 ohms [0.6v/0.025A], and
>> go. You will "never" actually see Vcc+0.6v on the pin, due to
>> the IR drop.
>
>The issue in this thread is that the pin is specced for 0.3v above Vdd, and
>before the internal clamping diodes 'kick in' you can have more than 0.3v.
>

Just make sure to have a series R right at the pin.
=============


>> I have a more interesting question, however.
>>
>> Say you use the 2D but no R. And say you overvoltage it, and
>> run too much current thru the internal diodes, and blow them.
>> Well, you still have the external diodes there, and seems they
>> will forthwith protect the chip from the stresses the built-in
>> diodes where in there for in the first place - ESD. And they
>> will certainly be much more robust than the internal diodes.
>>
>> No ????????/  [any takers?]
>>


Too bad - no takers.

- dan
=============

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