No. I'm saying that all 12 bitters are documented to start at the top; just sometimes people don't realize it and 'get away with' starting at the bottom because the PC typically wraps around to 0 and the blank instruction at the top of memory has no ill side effects. I don't believe this behavior (wrapping from top to 0) is necessarily guaranteed. However, the 12 bit devices with internal OSC ARE DOCUMENTED to execute the instruction at the top of memory and THEN WRAP to 0. When a 12 bit device is reset, its PC is set to TOP OF MEMORY but its page select bits are set to page 0. Therefore, a JMP at the reset vector (top of memory) will land in PAGE 0. At 10:52 AM 8/5/01, you wrote: > > ALL 12 bitters start at TOP OF MEMORY and ALL 14 bitters start at 0. >Often > > people depend (perhaps without knowing it) on the PC to wrap around from > > TOP to 0, making it APPEARS as though it started from 0. > > > > The 12 bitters with internal OSC ARE documented to start at the top (to > > load the OSCCAL value into W) and then wrap to 0. > >So you say all 12-bit cores start at the top but for the non-osccal ones >this is not documented? Good candidate for an obscure factoid... > >Wouter > >-- >http://www.piclist.com hint: PICList Posts must start with ONE topic: >[PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads Jerry Merrill jerrym@tech-tools.com http://www.tech-tools.com FAX: (972) 494-5814 VOICE:(972) 272-9392 TechTools PO Box 462101 Garland, TX 75046-2101 Join our PIC discussion list at http://www.tech-tools.com/picsource.htm -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads