> >> if the load is > >> inductive (or capacitive) there will be a phase shift between the DC > >> voltage and DC current. However, the fact remains that a triac will turn > >> off when conducting the DC current of a half or full wave rectified > >signal. > > > >It's more than just a phase shift issue. Series inductance can cause the > >current to never reach zero (or fall below the triac dropout current). > > Well, it obviously *must* pass through zero twice per cycle. A full wave rectified sine wave with no DC is ABS(SINE()). This goes to zero twice per cycle for a short time (instantaneously with perfect rectifiers). Now imaging this signal connected to a sufficiently large inductor and some resistance. Since this signal has an average DC component, there will be an average DC current thru the inductor, which will be AVE(ABS(SINE()))/R. The current in the inductor will lag the rectified voltage, but will also "average" it. With an inductance of 0 the current will be ABS(SINE())/R. With an infinite inductor in steady state, the current will totally flat at AVE(ABS(SINE)))/R. Real inductances will vary it between these two extremes, but lowest point in the current waveform will rise from 0 when the inductance is increased from 0. For real world parts some minimum inductance will be required to overcome the finite time the voltage is 0 due to voltage drops in the rectifiers and to get past the SCR holding current. ******************************************************************** Olin Lathrop, embedded systems consultant in Littleton Massachusetts (978) 742-9014, olin@embedinc.com, http://www.embedinc.com -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu