> 1.  General purpose registers start at 20H instead of 0CH.
>
>     (ACTION: Change CBLOCK start addresses and any other relevant
>      equates accordingly)

Or change one definition in the linker control file which can then be
applied to multiple projects without any source code changes.

> 4.  EEADR and EEDATA registers have moved from Bank 0 to Bank 1.
>
>     (ACTION: Change positions of "BSF STATUS,RP0" and "BCF STATUS, RP0"
>      instructions in EEPROM read and write code fragments) (*)
>
>     (N.B. My copy of the 16F62X data book ("Preliminary") appears to
>      have implemented this change in Example 13-2 (Data EEPROM Write)
>      but not in Examples 13-1 and 13-3)

A far better answer is to never "manually" do bank selection in the first
place.  For example, anyone who used the DBANKIF macro in STD.INS.ASPIC at
http://www.embedinc.com/pic would not need to make any source code changes
due to special function registers being moved around from chip to chip.


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, olin@embedinc.com, http://www.embedinc.com

--
http://www.piclist.com hint: To leave the PICList
mailto:piclist-unsubscribe-request@mitvma.mit.edu