At 11:16 PM 7/21/01 -0400, you wrote:
>
>I believe the cost to set up a single production line for handling CSP
>parts - with rework (removal and replacement of CSP parts) is on the order
>of $2.5M.  Double this for an X-Ray laminography tool (Agilant has some nice
>ones you can buy - but remember to reinforce your floor; they weigh about 6
>tons each)!

That may be true, for new stuff anyway, but I would have no problem getting
a small quantity such as 100 pieces of CSP or BGA board assembled, with
X-ray inspection, for a reasonable price, and I don't think anyone else in
an industrialized country would. I agree it's (probably) out of the hobby
category, but it *could* be within easy reach of small businesses. 0201 parts
and the small 8 "pin" NS CSP parts like the old 555 and TL431 are also
things that I will likely never assemble myself with my trusty Weller WCTP
solder station (or the Metcal, for that matter). Some of the COP-8 micros
are available in a 28 pin CSP package, which would be really nice for some
applications (but, IMHO, we need flash/ISP for it to be practical in small
quantities).

>Before I would consider it being in any useable for more than something like
>mass-produced Cell phones and PDAs, I would like to see this part sold as a
>35-50 mm PGA (Pin Grid Array) to start off with maybe some 268 pins QFPs -
>which are about 25 mm to a side.

I'd still send that out, but there are hobbyists who say they can do it. I
have an FPGA (Spartan-II) that is a 208 QFP and not only is it HUGE but
it has way too many pins for me to give it a try. TI's MSP430x14x is in a
64-pin QFP, with 0.5mm pitch, actually *finer* than the Matsushita chip
in question. That's well into 10-20x microscope territory for hand work.

Probably the answer for engineers who want to fool with the chip or whatever
is the evaluation module, a simple PCB with the chip mounted. Similar to
what Z-world/Rabbit are doing with their processors. At 256 pins, though,
that's almost 13 linear inches of double-row 0.1" pin headers (!), so
the board would have to be more than 3" on a side.

I really wish the Japanese would actively promote their 16/32 bit processors
more in the N. American market, including making them very available at a
reasonable price in small quantities.. I get the impression they *still*
don't see flash as much more than a stop on the way to mask. That was
really what made Microchip from a nobody spinoff with an obsolete
architecture into a serious contender-- aggressive marketing and their
embracing the then-new OTP as a *production* strategy. Flash/ISP allows the
processors to be mounted on the boards and the software then loaded in,
so high-density packages become practical in smaller quantities (imagine
how much Yamichii would want for a programming socket for a 256 pin CSP!)
With all those pins, the JTAG pins don't have to be shared either- just
take them to a nice little 2mm header or whatever. Or use test pins on
the PCB and don't bother with a header at all.

I suspect a similar thing is happening with the PICs, a *broadening* of
package options, and the eventual death of the DIP package in larger pin
counts (say, over 20 or 28).

Best regards,

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Spehro Pefhany --"it's the network..."            "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Contributions invited->The AVR-gcc FAQ is at: http://www.bluecollarlinux.com
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