> > No-one produces chips like this 'just in case' - I wonder what the
> > intended vtarget application is  - a single-chip car perhaps ? Must be
> > something pretty special to justify that number of I/Os!
>
> This one takes the cake but it doesn't look that out of place
> amongst Japanese microcontrollers. Mitsubishi, Sharp, Fujitsu,
> Toshiba, all make microcontrollers with several of everything in
> them. The problem is the typical Japanese business model doesn't
> really suit a typical PIC customer. Standard packing quantities of a
> sample or a shipping container and development tools in the same
> price bracket as the average familly car don't really make them Digi-
> key fodder.

When I looked at the original information, I decided from the last line that
this part wasn't something that would ever challenge the PICmicro (or the
Basic Stamp, 8051, AVR or HC11).  There's no way a hobbyist is going to use
this part - I'm surprised that nobody has commented on use of the CSP
package; 16 mm**2, 0.65 mm between pin centers.

"CSP" is an acronym for "Chip Scale Package" and is a plastic package just
slightly larger than the Silicon Di that is contained within it.  The pins
are eutectic solder "bumps" in a two dimensionaly array and soldered onto a
series of pads.  CSP is a technology designed to avoid the need for placing
and wiring chips directly to a PCB (known as "COB" or "Chip On Board"
technology).  The reason why COB is not considered to be an "ultimate"
technology is because of the reliability isses associated with the
differences in thermal expansion between the silicon chip and the
fibreglass/epoxy PCB along with the copper traces on the PCB.

0.65 mm between pin centers is 0.026".  To put this into perspective,
typical PICmicro MCU SMT distance between lead centers is 0.050" which is
possible to work with at home (I've hand soldered 0.25" QFP ("Fine Pitch")
parts).  But for these parts, there is a row of pins, all of which can be
visually inspected.  The 2-D bumps on the back of this part cannot be
visually inspected - ideally an X-Ray laminography tool would be required to
look for shorts and opens.

I believe the cost to set up a single production line for handling CSP
parts - with rework (removal and replacement of CSP parts) is on the order
of $2.5M.  Double this for an X-Ray laminography tool (Agilant has some nice
ones you can buy - but remember to reinforce your floor; they weigh about 6
tons each)!

Before I would consider it being in any useable for more than something like
mass-produced Cell phones and PDAs, I would like to see this part sold as a
35-50 mm PGA (Pin Grid Array) to start off with maybe some 268 pins QFPs -
which are about 25 mm to a side.

myke

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