No-one produces chips like this 'just in case' - I wonder what the
intended vtarget application is  - a single-chip car perhaps ?=20
Must be something pretty special to justify that number of I/Os!

On Sat, 21 Jul 2001 04:50:04 -0400, you wrote:

>Russel, this chip looks phenomenal.  Do you know what the pricing is?  =
At
>256 pins, the general I/O is mind boggling, considering what I did with =
33
>on the F877.
>
>-----Original Message-----
>From: pic microcontroller discussion list
>[mailto:PICLIST@MITVMA.MIT.EDU]On Behalf Of Russell McMahon
>Sent: Saturday, July 21, 2001 1:20 AM
>To: PICLIST@MITVMA.MIT.EDU
>Subject: [EE]: 1 chip madness
>
>
>Just stumbled across this "microcontroller".
>Hard to believe that this wouldn't take the prize for ultimate (so far)
>single chipper)
>12 UARTS
>On chip v reg.
>Runs on 2 volts at 28 MHz / 28 MIPS
>25 x 10 bit A2D
>7 PWM
>169 I/O
>125 IRQs
>etc
>
>
>
>    RM
>
>_________________________________
>
>
>
>http://www.matsushita.co.jp/corp/news/official.data/data.dir/en010131-3/=
en01
>0131-3-2.html
>
>Specifications
>
>MN103SF33N: with flash memory
>MN103S33N: with mask ROM
>
>Performance/Voltage         40 MIPS / 40 MHz / 2.5 V
>                            28 MIPS / 28 MHz / 2.0 V
>Power Consumption           200 mW (40 MHz, 2.5 V)
>                            90 mW (28 MHz, 2.0 V)
>Internal Memory             512 KB flash memory (MN103SF33N)
>                            512 KB mask ROM (MN103S33N)
>Internal RAM                24 KB
>Extended Arithmetic Unit    Multiply-accumulate function:
>                            32-bit x 32-bit + 64-bit =3D 64-bit (1 =
cycle)
>Timer Counter               8-bit: 20 (8/16/24/32-bit selectable),
>                            16-bit: 12, WDT: 1
>PWM                         7 (12/14-bit: 5, 16-bit: 2)
>Serial Interface            UART/Sync./IIC: 10
>                            UART: 2
>A/D Converter               10-bit: 25 inputs
>DMA Controller              4 channels
>Input Capture               28-bit: 13
>On-chip Regulator           Available at 3V single power source
>Bus Interface               Address/data separated bus (data =
8/16/32-bit)
>                            Address/data common bus (data 8/16-bit)
>                            Bus terminal power supply selectable
>ROM Collection Function     4 channels
>Boundary Scan               Available (JTAG standard)
>Interrupt Source            125
>IO Port                     169
>Package                     256-pin CSP (16-sq.-mm, 0.65-mm pitch)
>
>--
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