Jim Kane wrote:
>Hello folks;
>1)  Why is the duty register 10 bits when the pr is 8?  It seems that
>whenever either upper bit is set in duty, the output will be 100%.
>2)  I am using tmr0 int.  In the isr a register is decremented, if it isn't
>at 0, a retfie is executed, if it is at 0 a goto is made.  Is this a
>generally accepted technique?
>


Jim,

1 - For PWM duty cycle, bits 4/5 of CCPxCON are concatenated to
the low end of CCPRxL to get a full 10-bits, while the period uses
only the 8-bits of PR2. If bits 4/5 are just left as 0's, you
use the CCPRxL register alone for 8-bit duty cycle.

2 - It's unclear from your description, but normally you do not
want to < goto > "out of" the ISR, but you can branch around inside.
In normal ops, you leave the ISR only via retfie.

Regarding executing retfie, you cannot of course simply do it,
but need to do all of the correct register saves and restores
on entering and exiting the ISR - as described in the PIC
datasheets - else the cpu will crash.

--
http://www.piclist.com hint: The list server can filter out subtopics
(like ads or off topics) for you. See http://www.piclist.com/#topics