Circuit Cellar had a nice article on these, and I recently got to see
them at Chicago ESC (talk with the booth people, etc)

You should look into these, especially if you're thinking about using
more than one PIC.  It has 8 digital 'blocks' which can each be
configured individually as PWM, UART, Timer, etc.  It has twelve
similarily configurable analog blocks, and a Cypress cpu core.

They are trying to get digikey to sell them, but you can go through
other distributors.  A full ICE is $125, free software on the website.
 The software does not have simulation capability yet, but they are
looking toward that end.  It's made by a subsidiary of Cypress, Cypress
MicroSystem, http://www.cypressmicro.com/ .

Another article is available online from Electronic design,
http://www.planetee.com/planetee/servlet/DisplayDocument?ArticleID=12992#Top


-Adam


Terry wrote:

>Russ, check out the Cypress PSoC. I swore i'd never touch another M8 MCU
>but this chip is lookin mighty tempting. 8 digital configurable blocks, 12
>analog blocks, 1 MAC etc... All under US$3 (10K) for the 20 and 28 pin
>versions.
>
>Cheers
>Terry
>
>At 12:49 AM 7/11/01 +1200, you wrote:
>
>>Well, sort of
>>More a "which way should I jump" challenge.
>>Smallish run commercial project - say 100 to 200 units.
>>Cheaper would be nicer but labour costs will predominate.
>>Lower than higher current nice.
>>
>>Processor sends serial to a printer, serial from a GPS, serial from a card
>>reader, reads/writes a 32K IIC eerom, talks to a central processor.
>>All inter peripheral links are N81 ASCII at true RS232 levels. All data
>>links are at 4800 baud.
>>
>>Want to get this going with minimal effort and cost. At present Scenx with
>>virtual peripherals seems the probable easiest.
>>
>>3 x 4800 UART receives
>>2 x UART TXs
>>1 x EEROM read/write
>>GPS data filtering
>>Data request/write control
>>Data direction to/from peripherals.
>>
>>Send data to central processor via 4800 baud link.
>>Abort GPS read if card reader starts.
>>Can handle card reader and eerom write if both overlap.
>>Maybe queue card reader if occurs during eerom read but maybe abort block
>>read and repeat thereafter.
>>eerom read / write is always either 2 bytes or 64 bytes.
>>
>>GPS should have output filtered to normally only forward RMC string (coz at
>>4800 baud this takes about 15% of channel bandwidth with 1 second update
>>whereas all standard messages take about 85%).
>>
>>With virtual UARTS with say 4 samples per bit at 4800 baud that's 50 uS
>>polling cycle.
>>Scenix handles with ease.
>>20M PIC also really.
>>Just maybe a 4 M PIC (maybe).
>>
>>Anything out there with 3 hardware UARTS and costs about nothing ?(I'm being
>>lazy)
>>
>>Could just about do this with 8 i/o lines (2 x TX, 3 x RX, 2 x IIC = 7)
>>Something else will crop up needing at least one more.
>>
>>Modest EEROM on chip would be nice but not essential.
>>
>>Scenix is not cheap and is power thirsty but the virtual peripherals do look
>>attractive.
>>
>>Any thoughts???
>>
>>
>>     Russell McMahon
>>_____________________________
>>
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