----- Original Message -----
From: Bob Ammerman <RAMMERMAN@PRODIGY.NET>


> You certainly _can_ divide an encoder signal. It just requires a fancier
> state machine than a normal binary counter. :-)
>
> One complicating factor is that the machine has to change state on both
> edges of both inputs. This is rather trickier than just a 'current
> state'->'next state' machine driven by a single clock (unless, of course
you
> drive it with a separate clock that runs faster than either input).
>
> I suspect this could be done with a PIC12C508 at 4MHz clock and handle up
to
> about 100,000 Hz inputs.

I've made an absolute counter based but I've had trouble handling anything
beyond 50kHz input frequency (on a 4MHz chip) before it starts loosing track
of state changes and skipping states.  That's about 20 instruction cycles,
maybe I'm too inefficient?  That's the best I've been able to do.  Can
anyone say they've done better?  It certainly does the job but if I can
squeeze a few cycles then it would be of benefit to my project.  The
application note 00532 that was linked by another poster doen't reveal a
simpler or more efficient system that I can tell, actually it appears to use
a programable logic device to do that based on my interpretation of appendix
B.  That logic looks pretty hairy but I expected such.

Jeff

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