>         bsf     INTCON,INTE             ; rb int
>         bsf     STATUS,RP0              ; RAM Page 1

This only guarantees register banks 1 or 3.  You should either clear the RP1
bit or document that you know it is clear.

>         bsf     PIE1,0                  ; timer1 overflow enable bit

Use the mnemmonics in the include file.  This is the correct instruction,
but it is much better to use TMR1IE instead of 0.

>         bsf     OPTION_REG,INTEDG       ; bit 6 INTEDG: rising edge Select
bit,
>         bcf     STATUS,RP0              ; RAM Page 0
>         bsf     INTCON,GIE              ; enable all ints specified above

Not quite.  This allows all interrupts globally, but you still need to
enable the "peripheral" interrupts to get any of the interrupts enabled
individually in the PIEx registers.  You should add:

          BSF     INTCON, PEIE            ;enable peripheral interrupts


********************************************************************
Olin Lathrop, embedded systems consultant in Littleton Massachusetts
(978) 742-9014, olin@embedinc.com, http://www.embedinc.com

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