Olin Lathrop wrote:
>
> > My point is it is making a *lot* of difference--the "wrong" way.  At
> > 19.2k the idle time between bytes is 55us whereas at 38.4k the idle time
> > is about 185us.
>
> That is what you expect to get with a properly written UART routine (waits
> for ready before writing to TXREG, not after, as Bob pointed out) when the
> rest of the system doesn't produce bytes as fast as they can be sent.  One
> character transmit time is always overlapped with the processing for the
> next byte.  The remaining processing time turns into a gap between the
> bytes.  At the slower baud rate, more of the processing time is overlapped
> with the UART sending the previous byte, and therefore the gap between bytes
> goes up by a large ratio as the baud rate is increased.  Does this make
> sense, I'm not sure I'm saying this right?

It makes a lot of sense--in terms of percentage.  But I wouldn't expect
the actual "processing time" (real time) to lengthen--especially by a
factor of three--simply by increasing the rate at which the TX buffer
becomes available.

David Koski

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