> My point is it is making a *lot* of difference--the "wrong" way. At > 19.2k the idle time between bytes is 55us whereas at 38.4k the idle time > is about 185us. Simple calculation - since you set up SPBRG=5 then you have (5+1)*10*16/4 = 240 instruction cycles to generate new byte of data. And since the TXBUF can hold one byte while another is being transmitted from the shift register, you can also generate 2 bytes after 480 cycles and still keep your transmition back to back (no idle time). You could either speed up the computation or increase the main clock frequency. BTW, there are also 3.6864MHz crystals very common and they give exact baud rate, but baud rate difference is not your problem this time. Josef -- http://www.piclist.com hint: To leave the PICList mailto:piclist-unsubscribe-request@mitvma.mit.edu