On Fri, 18 May 2001, Ian Chapman wrote: > Thanks for this. I realise now that my reference to FPGAs in my initial > posting was misleading as I was originally intending to use something > like a MACH 4 device (i.e. a CPLD) for the DRAM addressing and control > logic. However, I'll consider this as an alternative approach. Xilinx has free web based tools for their 9500 and CoolRunner CPLDs as well as the Virtex 300E FPGA and the Spartan II FPGAs. Check out: http://www.xilinx.com/products/software/webpowered.htm I have used the web tools for several CPLD projects successfully. They also offer a free 60 day trial for their tools for their other FPGAs. David W. Gulley Destiny Designs -- http://www.piclist.com hint: The list server can filter out subtopics (like ads or off topics) for you. See http://www.piclist.com/#topics