At 09:57 AM 5/4/01 -0700, Dipperstein, Michael wrote:
>I've been using the ICE with an 16F877 ever since the factory managed to ship
>the processor modules.  I haven't noticed the stack underflows in sleep.  If I
>try to reset or halt the ICE while it is asleep, I have to acknowledge a
>series
>of pop-up windows with warnings, but stack underflows are not among the
>warnings.

I finally got through to Mchip, and they say that it's a limitation of the
pod.
You have to run through sleep, not sstep.


>I have noticed that stack underflows will usually happen when the ICE is being
>powered by the target, and the power is removed.  Among other things, the
>PIC I
>use acts as a switching power supply, and if I halt the PIC in the wrong
>state,
>I loose VDD.  More often then not, that results in a stack underflow.

VBG  Sounds like a fellow I knew, who was debugging an impact printer with
an ice.
You really don't want to breakpoint when the print hammers are on..

>Does VDD glitch when you sleep your processor?

No.
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