I've been using the ICE with an 16F877 ever since the factory managed to ship
the processor modules.  I haven't noticed the stack underflows in sleep.  If I
try to reset or halt the ICE while it is asleep, I have to acknowledge a series
of pop-up windows with warnings, but stack underflows are not among the
warnings.

I have noticed that stack underflows will usually happen when the ICE is being
powered by the target, and the power is removed.  Among other things, the PIC I
use acts as a switching power supply, and if I halt the PIC in the wrong state,
I loose VDD.  More often then not, that results in a stack underflow.

Does VDD glitch when you sleep your processor?

-Mike
-----Original Message-----
From: David VanHorn [mailto:dvanhorn@cedar.net]
Sent: Friday, May 04, 2001 9:24 AM
To: PICLIST@mitvma.mit.edu
Subject: MPLAB ICE and Sleep


Haven't been able to get through to Mchip, so I'll ask here.

Running the F627, when I execute the sleep instruction, the ice breaks with
a stack underflow.

Is this normal?
Is there anything I can do about this?
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