Nick,

 If you have no prescaler and you write 255 to the TMR0 register,
 you can get an interrupt in 3us I believe.  It may be slightly
 more than that, but not much.   I get this from the fact that
 writing a value (255) to TMR0 means the next clock will overflow
 it.   But, since you wrote to it, there is a two cycle delay before
 it increments again because it has to synchronize.  Therefore 3us.
 If this is wrong, I'm sure someone will correct me.  I'm recalling
 this from memory because I don't have the datasheet in front of me.
 So don't be too harsh if I'm not completely correct.

                                          Regards,

                                             Jim


On Thu, 26 April 2001, Nick Veys wrote:

>
> Just double checking this.  At 4MHz, the timer will interrupt every:
> 256((2^(prescaler+1)/(2^22)) seconds.  So with a 0 prescalar you'll be
> getting an interrupt every: 256(2/(2^22)) seconds (122us)?  This appears to
> be the smallest obtainable period with this clock speed.  If anyone can
> confirm this, it'd be much appreciated!!
>
> Also, if someone has a better timer interrupt reference than the 16F84 data
> sheet, I'd appreciate that too.  The datasheet merely says 1:2 .. 1:256
> prescalars are available and I only assume that means clock/2^(prescale+1).
>
> Thanks!
>
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jim@jpes.com

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