> > 2 - Redesign the circuit to guarantee a maximum rise time. > Unfortunately, option (2) is a bit bogus: without a rise time spec > you'll never know if your circuit is fast enough. I couldn't say that I disagree with your comment but when you think about it, a risetime spec for a reset circuit is rather bogus itself. If you consider an ideal situation, there is no need for time to come into the situation other than sometime after the oscillator has started and the pre-reset state is established. Other than that, the requirement is purely voltage threshold based. Add in some reality and you have the situation where a slowly rising Vcc reaches the threshold point. At this point the micro is most susceptible to noise. Any noise that exceeds the hysteresis threshold will try to put the micro back into the reset state and if that transition occurs within a minimum time (reset pulse width), puts the micro into an undefined state. Also the act of the micro coming out of reset makes it draw substantially more current, both internally and with whatever is attached to the pins, again reducing the effective hysteresis threshold. To counteract this you can either ensure that the voltage is higher by the time the current draw increases or lower the impedance of the supply. If you consider why a supply would rise slowly, it's generally because it has a high impedance in there somewhere. So if you give the micro a generous, low impedance source close by, the effects of the slow risetimes are reduced locally. A capacitor to do this has to be quite large because we are talking about lowering the supply impedance over a much longer time period than the 10nF decoupling issues often discussed. If you put say 47uF right next to the micro, you'll increase the startup reliability for slow Vcc risetimes even though it is counter- intuitive to add capacitance. However, as Bob says, you don't have a figure to work towards as a spec so you can only improve and not "fix" the problem with this approach. So if I had a product where a slow risetime was an exception and testing revealed that it could occur, I would be happy with this as a fix. If a slow risetime was expected as the norm or a common occurance, I would want to do something a bit more affirmative. In that case I would look at something like a regulator with a shutdown facility and use a zener to turn it on. Steve. ====================================================== Steve Baldwin Electronic Product Design TLA Microsystems Ltd Microcontroller Specialists PO Box 15-680, New Lynn http://www.tla.co.nz Auckland, New Zealand ph +64 9 820-2221 email: steveb@tla.co.nz fax +64 9 820-1929 ====================================================== -- http://www.piclist.com hint: PICList Posts must start with ONE topic: [PIC]:,[SX]:,[AVR]: ->uP ONLY! [EE]:,[OT]: ->Other [BUY]:,[AD]: ->Ads