I could be wrong but:
About the best write you could do is 3 cycles (Write Addr, Write Data, Do
Operation) and I guess 3 for read (Write Addr, Do Operation, Read Data). On
a 20MHz PIC that 3x 50 ns = 150ns, or on a 50MHz scenix 60ns. For reading
you'd need <50ns (PIC) or <20ns (SX) or for multiple writes.

Cypress have 512Kx8 (4M) SRAM down to 12ns which should give 3 (or 4) cycle
read or write with appropriate pin organisation. I guess on a 75 or 100MHz
SX or with external hardware  (e.g. external support for incrementing
address after each byte could allow you to use the PSP at higher speeds) onw
might be able to go faster but not much.

Tom.
-----Original Message-----
From: Simon Nield [mailto:simon.nield@QUANTEL.COM]
Sent: Thursday, February 22, 2001 9:16 PM
To: PICLIST@MITVMA.MIT.EDU
Subject: Re: [PIC]: SIMM interfacing?


drew:
>I'm sure it's possible, but is it practical to interface to a SIMM memory
>module for lots of (fast) memory?  I haven't thought about it at all, so

I noticed this the other day:
http://www.piclist.com/techref/microchip/picsimm.htm

You might find that SODIMMs are worth looking at too (32 or 36 bit wide data
i think) if you are
thinking of making a commercial product, as SIMM prices are pretty steep
compared with SDRAM
(probably because simms use older non-synchronous dram chips which fewer
companies are making
nowdays). Standard DIMMs are probably out as they are 64 bit I think, which
probably means too much
extra circuitry to make it worthwhile.

Regards,
Simon

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