> Why not configure one PIC as a xtal osc and connect a gate to the
oscillator
> output to act as a buffer for distribution of the clock signal to the
other
> PIC's

With the right gate this should work.  What makes me uneasy is that I don't
remember that the voltage levels at the oscillator output pin are specified.
(Maybe they are, I haven't looked).  Without having a guaranteed min level
for high and max level for low, how do you know the buffer gate will work?
I don't think OSC OUT is driven as a normal digital output in XT or HS mode.

I think doing this would be fine for a one-off personal project after
inspecting the signal with a high impedence scope probe.  However, I
wouldn't want to go into production without solid specs.


*****************************************************************
Olin Lathrop, embedded systems consultant in Devens Massachusetts
(978) 772-3129, olin@embedinc.com, http://www.embedinc.com

--
http://www.piclist.com hint: The list server can filter out subtopics
(like ads or off topics) for you. See http://www.piclist.com/#topics