At 08:28 AM 2/10/01 -0500, you wrote:
>
>Voltage on any pin with respect to VSS
>(except VDD, MCLR. and RA4)
> -0.3V to (VDD + 0.3V)
>
>Input clamp current,
>IIK (VI < 0 or VI >VDD)
>+/- 20mA
>
>Now to me, these two specs seem to contradict each other.

If the voltage source is zero source impedance, do not go more than 300mV
outside the rails (which are also assumed to have zero source impedance).
At any temperature within the range, the resulting current will not be
harmful, on an absolute maximum basis.

Otherwise, it's ok, but don't come anywhere near the 20mA abs. max,
and be prepared for possible other side effects as a result (increased
Vdd due to current flowing through pins, possible leakage out of
adjacent port pins, that sort of stuff).

Best regards,


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