Yes, thank you. I tried a series of 74hc buffers but
the problem is the output voltage is greater than the
supply voltage. Why? Can you give me some reasons?
I'll try using ls buffers today. The reason why I'm
asking for the delay chip is for the frequency
multiplier I'm asking before. I can't generate the
frequency multiplier using resistors and capacitors
for the delay. Using hc buffers, I  needed to use 4
hc244 to generate 290 ns. That's quite bulky. Does
anyone help me design delay time using resistors and
capacitors?

Thanks again. More power to all of you sirs.

--- Myke Predko <myke@PASSPORT.CA> wrote:
> Hi Jane,
>
>
> > Does anybody knows of any chip that generates
> delay up
> > to 400 ns?
>
> There are lots of them.  Virtually any distributor
> has a number you can choose from.  But they can be
> *really* pricy (they generally start at $10 for one
> off quantities).
>
> A better solution is to line up a bunch of gates and
> implement the delay that way.  Assuming a nominal 10
> nsec delay for a TTL inverter, a 74LS04 is a 60 nsec
> delay with 20 nsec taps just waiting to be used.
>
> The table that I use for delays according to
> technology type is (sorry for sending the email in
> HTML format, but I wanted to make sure the table was
> readable and OE screwed it up):
>
> Family        Typical Delay
> 74AS           2 nsec
> 74S            3 nsec
> 74AC/74ACT     3 nsec
> 74F            3.5 nsec
> 74ALS          4 nsec
> 74H            5.9 nsec
> 74HC           9 nsec
> 74LS          10 nsec
> 74            11 nsec
> 74L           35 nsec
> 74C           50 nsec
>
> So, if you get yourself a 74C04 (available from
> Fairchild, among others), you have a maximum 300
> nsec delay with 100 nsec taps.
>
> myke
>
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