one more to the lot?
alok


-----Original Message-----
From: Peter L. Peres [mailto:plp@ACTCOM.CO.IL]
Sent: Friday, November 24, 2000 3:35 PM
To: PICLIST@MITVMA.MIT.EDU
Subject: Re: [PIC]: Working dual-clock speeds


Here is something that works in the lab (for me):

              +--X1--+--R1---+
              |      |       |
              |      C1      |
              |      |       |
              |     gnd      |
              |              |
uC OSC in <---+--X2--+--___--+---< uC OSC out
              |      |   | SW
              C2     C3  |
              |      |   +-------< Select Xtal: H: fast
             gnd    gnd

X1 is a a 32kHz watch crystal and X2 is 3.57MHz. SW is 1/4 CD4066 or a low
Vp FET without reverse diode. The PIC was set to XT osc for this.

The circuit operates due to the Q rule. The Q rule says that given an
oscillator with a fixed gain and two or more frequency-defining circuits,
the frequency of the oscillator will be determined by the frequency
defining element with a higher Q. R1 is chosen as high as possible. The
switchover time is about half as long as it takes the 32kHz crystal to
start up or to stop, and during that time there may be no clock at all at
least when switching from 3.57 to 32kHz. Some experiments indicate that a
resistor across X1 is necessary to lower the Q of the watch crystal. 2M2
worked for me I think. Now, why would one want to try this knowing that
the PIC's oscillator programmed for XT will draw significant current even
when run at 32kHz ?

Peter

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http://www.piclist.com hint: The PICList is archived three different
ways.  See http://www.piclist.com/#archives for details.