>I don't think it's that simple.  There are other instances where the
>18C instruction set would require more bits to get the same job done.
>For example, GOTOs contain the full 20 bit address, whereas 16C PICs
>only contain an 11 bit address.

O.K., but GOTO doesn't need paging when jumping to bigger address and you
can use branch of -128/+127 words.

>Another example is that the FSRs are now 2 bytes long, which requires
>them both to be set properly before use.

Agree, but when you use small trick and optimize data structures, you
initialize all four pointers once at start and then just manipulate the
FSRxL. You can acess four independent pages of 256 bytes, plus you have
fifth by using BSR and 128 bytes in acess bank.

Andrej

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