nice one morgan! so cunning you could stick a tail on it and call it a fox.

what do you think of the small changes below to remove sensitivity to the polarity of RA4 ?
it's added 3 more instructions and juggled it around a little bit, but should make it more fire &
forget.
this code it _not_tested_ by the way, so beware.

Regards,
Simon

;********************************* FAST RESET *********************************
;Design Morgan Olsson, morgans.rt@telia.com
fast_reset:
        clrwdt  ;without this line the reset fails peridically -with the
                ;wdog freqency- probably depending on Wdog OSC output phase.
                ;-some undocumented connection.
fast_reset2:
        bcf     STATUS,RP0      ;Bank 0

;-Prepare
        clrf    INTCON          ;disable interrupts

;-Setup registers
        mowlw   (1<<RBPU)|(1<<INTEDG)|(1<<T0CS)|(1<<T0SE)|(0<<PSA)|(0<<PS0)   **
        btfsc   PORTA, 4                                                      **
        xorlw   (1<<T0SE)       ;flip bit in W if necessary                   **
        bsf     STATUS,RP0      ;Bank 1
        movwf   OPTION_REG
        bcf     STATUS,RP0      ;Bank 0
        clrf    TMR0            ;clear prescaler (also TMR0, but irrelevant)
        bsf     STATUS,RP0      ;Bank 1

;-Now clock the prescaler manually, by toggling T0SE
        movlw   (1<<T0SE)                                                     **
        xorwf   OPTION_REG,F                                                  **

;-Now the prescaler output apparently is "1", because...
        bsf     OPTION_REG,PSA  ;...assigning it to wdt cause immediate reset!

        goto    fast_reset2     ; in case it failed because RA4 changed polarity or whatever
                                ; will time out at 'normal' time if it keeps failing

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