mike:
>Not quite - you are loading the timer with 0f, not the prescaler.
bob:
>I get the feeling that the manual is warning about something that could
>happen, depending on who knows what factors, not on something that _will_
>happen every time.


by '0xf?' i meant some number from 0xf0 to 0xff. i realise that the number will be assigned to tmr0
not the
prescaler, but if the clock is set to internal then by the next instruction the lsb of the prescale
counter should be set (assuming for now that it wasn't already).
the way i read 26.3 and deciphered fig 26.1 suggests that the postscaler becomes slaved to whichever
peripheral it is assigned to. thus clearing tmr0 will clear the prescaler if it is assignet to tmr0,
and similarly clearing wdt will clear the prescaler if it is assigned.
26.3 suggests that the prescaler is not automatically cleared when its assignment changes... as bob
is suggesting however this is not garanteed to be the case.

something along the lines of the following (hacked from example 26.1) might/should therefor do the
trick:

clrf INTCON              ; disable interrupts otherwise they could ruin everything
bsf  STATUS, RP0         ; bank1
movlw     B'11010000'
andwf     OPTION_REG, F       ; internal clock, assign to tmr0, prescaler on lowest setting
bcf  STATUS, RP0         ; bank0
clrf TMR0           ; clear tmr0 and prescaler
comf TMR0, F        ; set tmr0
bsf  STATUS, RP0         ; bank1
bsf  OPTION_REG, PSA     ; assign to wdt... by which time bit0 of the prescaler should be set


worth a try anyway... at worst you end up waiting as long as normal.

Regards,
Simon

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