Roman is pointed in the right direction.  Triacs have a parameter called dv/dt.
The gate of the triac is capacitive, and as such a high dv/dt can push enough
charge over to the gate to false trigger the device.  This dv/dt parameter also
applies to opto triacs when they are in use.  You may have to use some form of RC
snubber to protect the Triac and properly hold the gate off.  I saw some great app
notes in SGS territory that covered the microprocessor driven tirac with details,
and even more in the area where they have a new multi channel triac trigger device
that mates up with your processor.

Do you have to pass UL and CE?  You might carefully study your non-isolated
strategy to see if you will pass.

Chris~

Roman Black wrote:

>
> The BTA12 is a pretty high gain device, seems you are relying
> in "high z" to stop the triac being gated. I would think
> you need some resistor to hold the triac gate "off" rather than
> relying on high-z which basically allows leakage or even RF
> to activate the traic.
>
> Also check you haven't fried the transistor, what current
> limiting (resistor?) are you using in the collector circuit?
> -Roman

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