Olin Lathrop wrote:
>
> >>
> >I was the one who posted the original macro.  Is this true!?  Can an
> >interrupt really happen immediately after the instruction that disables
> >interrupts?  This seems hard to believe.  I've never seen any mention of
>
> Apparently yes. I have not experienced it, but have seen code with this sort
> of construct in it. ...
> <<
>
> Hmm.  I'm trying to separate true fact from urban legend?  Does anyone have
> proof one way or the other regading this behaviour?
>
> Microchip, are you out there?

It doen't matter in this code using MPLAB

That suggests that the bcf INTCON,GIE kills the IRQ even if TMR0
overflows on that instruction. External IRQ's may have a different
mechanism.

To check it, I dumped the code into ROMzap and it worked the same.

I still remember reading something about it however, but it may be
because of externally genertaed interrupts.

        org 0h

        goto start

        org 4h

        bcf INTCON,T0IF
        retfie

start   bsf STATUS,RP0
        clrf OPTION_REG
        bcf STATUS,RP0

        clrf TMR0
        bcf INTCON,T0IF
        bsf INTCON,T0IE
        bsf INTCON,GIE

        movlw 0xA8
        movwf temp
loop    decfsz temp
        goto loop

        nop
        nop
        nop
        nop
        nop

; this NOP EXcluded, TMR0 IRQ fires on bcf INTCON,GIE
; this NOP INcluded, TMR0 IRQ fires on NOP

;       nop
        bcf INTCON,GIE
        goto loop


--
Best regards

Tony

ICmicro's
http://www.picnpoke.com
mailto:sales@picnpoke.com

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