> WAS: > > intr_off macro > > if fam_16 > > bcf intcon, gie > > endif > > if fam_17 > > bsf cpusta, glintd > > endif > > endm > > > BETTER?: > intr_off macro > if fam_16 > foo: > bcf intcon, gie > btfsc intcon, gie > goto foo > endif > if fam_17 > bar: > bsf cpusta, glintd > btfss cpusta, glintd > goto bar > endif > endm I was the one who posted the original macro. Is this true!? Can an interrupt really happen immediately after the instruction that disables interrupts? This seems hard to believe. I've never seen any mention of this issue in the Microchip docs, and yes, I DO read the manual. If this were really true I would expect at least a one of those gray boxes mentioning this issue. I just re-read the interrupt section of the 16F87x and 17C7xx data sheets and didn't see any mention of this issue. Both mentioned a possible interrupt latency of up to 2 or 3 cycles from external conditions, but I am assuming the interrupt still can't take place if they are globally disabled. Someone from Microchip please confirm/deny this? By the way, if you are going to put labels in a macro like this, you really should declare them LOCAL. ***************************************************************** Olin Lathrop, embedded systems consultant in Devens Massachusetts (978) 772-3129, olin@cognivis.com, http://www.cognivis.com -- http://www.piclist.com#nomail Going offline? Don't AutoReply us! use mailto:listserv@mitvma.mit.edu?body=SET%20PICList%20DIGEST