I did a 24 bit counter on a '54 a few years ago. It is not so hard. The
loop to check for the oveflow of TMR0 is not so tight, as you are looking
for MSB rollover in TMR0 (0x7F -> 0x80) and that occurs slowly (1/256 of
gate time worst case so you need to poll at least twice as fast - hint
hint). I had constant run time code for this to also implement gate timing
('54 has no interrupts). Adding the offset was not a problem, carry
propagates as designed when using successive addwfs/subwfs ;-) The problem
was converting to ASCII for display. I wrote a routine to convert using
successive substraction on 24 bits (then 16, then 8, as the remainder got
shorter I jumped back to a 'later' byte's substract). Whenever I had a
digit done I added the ASCII ofset '0' and sent it out to the LCD which
was in 4-bit mode, 2x16. There was no flicker. I also had leading zero
suppression and '\'' ticks between thousands.

imho your problem will be to locate a prescaler that is available for that
frequency range and does not consume more power than your whole project
together.

hope this helps,

Peter

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